Massive multiuser multiple-input multiple-output (MIMO) and millimeter-wave (mmWave) communication are key physical layer technologies in future wireless systems. Their deployment, however, is expected to incur excessive baseband processing hardware cost and power consumption. Beamspace processing leverages the channel sparsity at mmWave frequencies to reduce baseband processing complexity. In this paper, we review existing beamspace data detection algorithms and propose new algorithms as well as corresponding VLSI architectures that reduce data detection power. We present VLSI implementation results for the proposed architectures in a 22nm FDSOI process. Our results demonstrate that a fully-parallelized implementation of the proposed complex sparsity-adaptive equalizer (CSPADE) achieves up to 54% power savings compared to antenna-domain equalization. Furthermore, our fully-parallelized designs achieve the highest reported throughput among existing massive MIMO data detectors, while achieving better energy and area efficiency. We also present a sequential multiply-accumulate (MAC)-based architecture for CSPADE, which enables even higher power savings, i.e., up to 66%, compared to a MAC-based antenna-domain equalizer.

翻译：大规模多用户多输入多输出（MIMO）和毫米波（mmWave）通信是未来无线系统中的关键物理层技术。然而，其部署预计将导致过高的基带处理硬件成本和功耗。波束空间处理利用毫米波频段的信道稀疏性来降低基带处理复杂度。本文回顾了现有的波束空间数据检测算法，并提出了新算法及相应的VLSI架构，以降低数据检测功耗。我们在22nm FDSOI工艺中展示了所提架构的VLSI实现结果。结果表明，与天线域均衡相比，所提出的复数稀疏自适应均衡器（CSPADE）的完全并行化实现可节省高达54%的功耗。此外，我们的完全并行化设计在现有大规模MIMO数据检测器中实现了最高的吞吐量，同时获得了更好的能量和面积效率。我们还提出了一种基于顺序乘累加（MAC）的CSPADE架构，与基于MAC的天线域均衡器相比，可进一步实现高达66%的功耗节省。