With the slowing down of Moore's law, augmenting complementary-metal-oxide semiconductor (CMOS) transistors with emerging nanotechnologies (X) is becoming increasingly important. In this paper, we demonstrate how stochastic magnetic tunnel junction (sMTJ)-based probabilistic bits, or p-bits, can be combined with versatile Field Programmable Gate Arrays (FPGA) to design an energy-efficient, heterogeneous CMOS + X (X = sMTJ) prototype. Our heterogeneous computer successfully performs probabilistic inference and asynchronous Boltzmann learning despite device-to-device variations in sMTJs. A comprehensive comparison using a CMOS predictive process design kit (PDK) reveals that digital CMOS-based p-bits emulating high-quality randomness use over 10,000 transistors with the energy per generated random number being roughly two orders of magnitude greater than the sMTJ-based p-bits that dissipate only 2 fJ. Scaled and integrated versions of our approach can significantly advance probabilistic computing and its applications in various domains, including probabilistic machine learning, optimization, and quantum simulation.

翻译：随着摩尔定律的减缓，将补充金属氧化物半导体（CMOS）晶体管与新兴纳米技术（X）相结合变得越来越重要。在本文中，我们演示了如何将随机磁隧道结（sMTJ）基于概率位或p位与多用途现场可编程门阵列（FPGA）结合起来设计一种能源高效的异构CMOS + X（X = sMTJ）原型。我们的异构计算机成功地进行了概率推理和异步玻尔兹曼学习，尽管sMTJ间有器件间差异。使用CMOS预测流程设计工具包（PDK）进行全面比较，发现数字CMOS-based p-bits通过模拟高质量随机性使用超过10,000个晶体管，随机数的每个生成能量大约比仅耗散2 fJ的基于sMTJ的p-bit高两个数量级。我们方法的规模化和集成化版本可以大大推进概率计算及其在各个领域中的应用，包括概率机器学习、优化和量子模拟。